@inproceedings{ijcai2026p47,
  title     = {QiMeng-VPID: Verification-Grounded Port-Level Iterative Decomposition for Complex Verilog Generation},
  author    = {Wang, Hongguang and Guo, Jiaming and Zhang, Rui and Li, Zerun and Huang, Di and Jin, Pengwei and Du, Zidong and Hu, Xing and Guo, Qi and Chen, Yunji},
  booktitle = {Proceedings of the Thirty-Fifth International Joint Conference on
               Artificial Intelligence, {IJCAI-26}},
  publisher = {International Joint Conferences on Artificial Intelligence Organization},
  editor    = {Diego Calvanese},
  pages     = {410--418},
  year      = {2026},
  month     = {8},
  note      = {Main Track},
  doi       = {10.24963/ijcai.2026/47},
  url       = {https://doi.org/10.24963/ijcai.2026/47},
}