GraphPerf-RT: Graph-Driven Performance Modeling with Calibrated Uncertainty for OpenMP Scheduling on Heterogeneous Embedded SoCs

1 Introduction

Autonomous AI agents deployed on heterogeneous embedded Systems-on-Chip (SoCs) must make real-time scheduling decisions under stringent resource, energy, and thermal constraints. These agents, which power autonomous vehicles, robotic systems, and edge AI applications, require accurate performance prediction with calibrated uncertainty to ensure safe operation. Heterogeneous embedded SoCs combine high-performance and energy-efficient cores with Dynamic Voltage and Frequency Scaling (DVFS). This architecture has created unprecedented opportunities for deploying parallel applications in resource-constrained environments. OpenMP, the dominant shared-memory parallel programming model, enables developers to express task-level parallelism through pragma-based annotations that the runtime system maps to available hardware resources. However, achieving optimal performance on these heterogeneous platforms requires careful scheduling decisions that balance execution time, energy efficiency, and thermal constraints. This presents a challenging optimization problem that current approaches fail to address comprehensively. Performance prediction for parallel workloads has traditionally relied on analytical models, simulation-based methods, and machine learning surrogates. Analytical models grounded in queueing theory and scheduling bounds such as Brent's theorem provide theoretical insights but require simplifying assumptions that break down under irregular control flow and cache contention [Graham, 1969; Brent, 1974]. Simulation-based approaches offer high fidelity but incur prohibitive runtime overhead for online scheduling decisions. Machine learning surrogates, including Graph Neural Networks (GNNs), can learn complex input-output mappings from data [Veliˇckovi´c et al., 2018]. However, existing approaches such as ProGraML [Cummins et al., 2021] and Ithemal [Mendis et al., 2019] operate on static intermediate representations without incorporating runtime context, thermal state, or DVFS configurations that significantly affect embedded system performance. Complementary approaches address related challenges through hierarchical multi-agent DVFS scheduling [Pivezhandi et al., 2026b], zero-shot LLM-guided allocation [Pivezhandi et al., 2026a], statistical feature-aware task allocation [Pivezhandi et al., 2025], and flow-augmented few-shot RL [Pivezhandi and Saifullah, 2024].

1 Supplementary material and released artifacts are available at https://github.com/pivezhan/GraphPerf-RT IJCAI2026.

This paper addresses the problem of predicting performance metrics for OpenMP task-parallel applications on heterogeneous embedded SoCs. The framework supports multiple targets including execution time, energy consumption, and hardware counters; we focus on makespan prediction under varying DVFS configurations, core allocations, and thermal conditions. The prediction model must provide accurate point estimates and calibrated uncertainty quantification to enable risk-aware scheduling decisions. This is essential for respecting thermal constraints and avoiding failures in safetycritical deployments. Furthermore, the model should generalize across benchmarks, input sizes, and hardware platforms without extensive retraining.

Accurate performance prediction on heterogeneous embedded SoCs presents four challenges. First, performance emerges from cross-layer interactions between application structure (task DAGs, CFGs), hardware state (frequencies, thermal headroom), and scheduling decisions; classical heuristics treat these independently, missing critical coupling effects that cause 3-5× execution time variation. Second, tabular models flatten task graphs into aggregate statistics, discarding dependency structure, while GNN approaches focus on static representations without runtime context. Third, standard regression lacks confidence estimates needed for risk-aware scheduling on thermally constrained systems. Fourth, model-free RL requires extensive ondevice exploration risking overheating, while model-based RL needs an accurate environment model.

This paper introduces GraphPerf-RT, an AI technology that provides foundational infrastructure for safe, uncertaintyaware scheduling on embedded platforms. GraphPerf-RT addresses these challenges through a unified heterogeneous graph representation (see Fig. 1). Task nodes encode CFGderived code semantics; resource nodes capture per-core DVFS state, utilization, and thermal headroom; typed edges encode task-task precedence, task-resource placement, and resource-resource topology. A heterogeneous Graph Attention Network (GAT) with type-specific encoders processes the graph through 3-6 attention layers. Evidential learning with Normal-Inverse-Gamma (NIG) distributions provides calibrated uncertainty in a single forward pass. The surrogate scores candidate configurations, filters low-confidence proposals, and supports Dyna-style modelbased planning. Comprehensive experiments on three embedded ARM platforms (NVIDIA Jetson TX2, Jetson Orin NX, and RUBIK Pi) span 42 benchmarks from BOTS and PolyBench. GraphPerf-RT achieves R2 = 0.81 on logtransformed makespan with Spearman ρ = 0.95 for ranking and conservative uncertainty calibration (PICP = 99.9% at 95% confidence), significantly outperforming tabular baselines and homogeneous GNN architectures. Integration with four RL methods (SAMFRL, SAMBRL, MAMFRL-D3QN, and MAMBRL-D3QN) demonstrates that MAMBRL-D3QN with GraphPerf-RT achieves 66% execution time reduction (0.97 ± 0.35s vs. 2.85 ± 1.66s) and 82% energy reduction (0.006 ± 0.005J vs. 0.033 ± 0.026J) compared to model-free baselines across 5 random seeds with 200 episodes each.

The main contributions of this paper, which establishes GraphPerf-RT as AI infrastructure for autonomous embedded agents, are:

1. A unified heterogeneous graph representation for AI agents that jointly encodes OpenMP task DAG topology, CFG-derived code semantics, and runtime context (percore DVFS, thermal state, utilization) through typed nodes and edges, enabling explicit modeling of crosslayer performance interactions critical for autonomous decision-making.
2. An evidential prediction framework supporting multitask learning with calibrated uncertainty quantification through Normal-Inverse-Gamma heads, producing both aleatoric and epistemic uncertainty in a single forward pass. We validate on makespan prediction; the architecture extends to energy and hardware counter targets. This provides essential AI safety infrastructure for riskaware scheduling on embedded systems where overconfident predictions can cause thermal violations or hardware damage.
3. A practical AI agent integration demonstrating seamless combination with model-based RL, achieving 66% makespan and 82% energy improvements over modelfree baselines while reducing hazardous on-device exploration through Dyna-style synthetic rollouts enabled by GraphPerf-RT as a world model.
4. A reproducible AI4Tech evaluation framework including a complete data pipeline (OMPi + ALF-llvm + SWEET + telemetry), extensive experiments across three ARM platforms and 42 benchmarks, and statistical significance tests with 5-seed confidence intervals.

2 RelatedWork

Performance Modeling. Performance modeling spans analytical queueing/Petri-net models [Eager and Sevcik, 1983; Marsan et al., 1984], statistical surrogates [Lee and Brooks, 2006; Ipek et al., 2006; Wang and O'Boyle, 2018; Chen and Guestrin, 2016], and neural predictors. Black-box predictors using counters or instruction mixes improve accuracy but lose structural signals. Ithemal [Mendis et al., 2019] predicts x86 basic-block throughput via hierarchical LSTMs but operates on static assembly without runtime parallelism or thermal state. Graph-based representation learning has also been applied to HPC performance analytics [Ramadan et al., 2023], yet remains kernel-focused and does not incorporate runtime DVFS or thermal context. We model OpenMP task DAGs on embedded SoCs, encoding dependencies, per-core DVFS, and thermal context for real-time decisions.

Graph Neural Networks. GNNs enable learning on structured program graphs [Wu et al., 2021; Veliˇckovi´c et al., 2018]. ProGraML [Cummins et al., 2021] builds unified graphs from LLVM IR for compiler tasks but operates on static IR without runtime or thermal context. HGT [Hu et al., 2020] extends graph attention to multiple node/edge types but lacks: (1) edge decomposition separating structure from execution features, (2) thermal/DVFS integration, and (3) evidential heads for calibrated uncertainty. GNNs have predicted hardware-dependent performance [Huang et al., 2010] and optimization effects [Brauckmann et al., 2020]. We construct heterogeneous task-resource graphs with CFG-informed encoders and runtime context fusion.

Compiler Cost Models. Ansor, MetaSchedule, and ROLLER learn kernel-level evaluators with cross-device transfer [Zheng et al., 2020; Shao et al., 2022; Zhu et al., 2022; Zhai et al., 2023; Zhai et al., 2024], but operate below task graphs and rarely encode DVFS/thermal state. Silhouette [Papon and Wasay, 2022] learns CPU embeddings for cross-platform prediction; Glimpse [Ahn et al., 2022] develops mathematical hardware encodings for neural compilation. These focus on static kernel prediction without dynamic DVFS, thermal headroom, or task DAG structure. GraphPerf-RT integrates typed edges, execution features, and runtime device/thermal context into a unified graph representation.

Hardware-Aware ML and DVFS. Hardware-aware ML includes NAS with device constraints [Cai et al., 2019] and cross-platform predictors [Walker et al., 2017]. Energy/thermal DVFS spans heuristics, optimization, and RL [Xie et al., 2021]. Utilization-driven governors misscale frequency by conflating compute and stalls [Hebbar and Milenkovi´c, 2021; Lin et al., 2023]. Model-free RL adapts but is sample- and heat-intensive [Kim et al., 2021]; model-based control reduces sampling via learned dynamics [Moerland et al., 2023]. Recent work includes hierarchical multi-agent DVFS [Pivezhandi et al., 2026b], featureaware allocation [Pivezhandi et al., 2025], zero-shot LLM guidance [Pivezhandi et al., 2026a], and flow-augmented RL [Pivezhandi and Saifullah, 2024]. GraphPerf-RT is complementary: a calibrated graph-grounded evaluator supplying fast rollouts to MARL under thermal constraints.

Uncertainty Quantification. Uncertainty is critical for safe scheduling. Bayesian and ensemble methods add inference cost [Lakshminarayanan et al., 2017; Kendall and Gal, 2017]. Evidential learning yields calibrated intervals without sampling [Sensoy et al., 2018; Amini et al., 2020]. Early formulations suffered from evidence contraction [Wu et al., 2024], which we address through non-saturating regularization. We adopt evidential heads to expose confidence on makespan/energy and gate synthetic rollouts for real-time planning.

To our knowledge, GraphPerf-RT is the first unified graph representation combining OpenMP task DAGs with runtime context (per-core DVFS, thermal headroom, counters) and evidential regression for calibrated uncertainty in embedded scheduling. This enables risk-aware decisions under thermal constraints while maintaining computational efficiency for on-board deployment.

3 Preliminaries

3.1 ProblemFormulation

Extended formal definitions are provided in the supplementary material.

We predict multiple performance metrics for OpenMP task-parallel applications on heterogeneous embedded SoCs under varying DVFS configurations. Each application is a task DAG G = (V,E) with tasks v ∈ V characterized by CFG-derived features and precedence edges e ∈ E (spawn, join, or data dependencies). The platform has C cores with discrete frequency levels fi ∈ Fi. The device sheet D captures immutable hardware constants (core types, cache specs, DVFS tables), while runtime state S includes per-core frequencies, utilization, and thermal readings.

A scheduling action a = (m, f, p) specifies core mask m ∈ {0, 1}C , DVFS vector f , and optional priority p. Given (G,D, S, a), we learn M : (G,D, S, a) ↦→ (y, U), where y can include makespan, energy, or hardware counters depending on the target configuration. We focus on makespan prediction with calibrated uncertainty U via NIG parameters (γ, ν, α, β).

3.2 Heterogeneous Graph Abstraction

Extended graph formalization is provided in the supplementary material.

Performance emerges from interactions between application structure, hardware state, and scheduling decisions. As illustrated in Fig. 2, our heterogeneous graph has three node types: Task nodes VT (orange in figure) encode CFG features, DAG topology (depth, distance-to-sink, centrality), and runtime snapshots. Resource nodes VR (teal) encode percore DVFS state, utilization, and thermal headroom. Memory nodes VM (purple) encode cache hierarchy characteristics.

Four typed edges capture performance-critical cross-layer interactions: ETT (task-task precedence with critical-path flags), ETR (task-resource placement with affinity), ERR (resource-resource sharing/contention), and ERM (resourcememory bandwidth constraints). Device constants from D are broadcast during encoding.

3.3 Data Collection Pipeline

Complete pipeline specification is provided in the supplementary material.

OpenMP sources are compiled through OMPi, with ALFllvm emitting LLVM IR and ALF files. We use ALF not as a legacy artifact, but as a specialized intermediate representation that performs semantic lifting-explicitly exposing control-flow structure (loop bounds, recursion depths, branch patterns) that provides semantically dense features standard LLVM IR processing would miss. SWEET generates CFG/call graphs from this lifted representation, and postprocessing maps entities to OpenMP tasks with topological encodings. This approach bridges static analysis and runtime performance modeling by capturing control-flow invariants critical for accurate prediction. Runtime logging captures one CSV row per execution with telemetry: timestamps, DVFS indices, measured frequencies, performance counters (cycles, instructions, cache/branch misses), energy, and thermal readings.

The dataset comprises 73,920 samples across three platforms: RUBIK Pi (8 Cortex-A72 cores), Jetson Orin NX (8 Cortex-A78AE cores), and Jetson TX2 (6 cores, Denver+A57). We evaluate 42 benchmarks from BOTS and PolyBench with 60/20/20 train/val/test splits stratified by (benchmark, input, core mask, DVFS index).

3.4 Learning Formulation

Extended architecture details are provided in the supplementary material.

Type-specific MLPs encode nodes into a common embedding space, with separate parameter sets for each node type to handle their distinct feature schemas. A heterogeneous GAT (3-6 layers) performs message passing over all edge types ETT , ETR, ERR, and ERM. Hierarchical pooling aggregates node embeddings per type and concatenates them to form graph representation hG. For each metric k, evidential heads output NIG parameters (γk, νk, αk, βk) with the predictive mean ˆ yk = γk and uncertainty decomposition: Aleatorick = βk/(αk - 1) and Epistemick = βk/(νk(αk - 1)). Training minimizes the negative log marginal likelihood with evidence regularization to prevent overconfidence. At runtime, batched configurations are scored, filtered by uncertainty gates, and executed with outcomes logged for continual learning.

4 DesignMethodology

This section presents the GraphPerf-RT architecture. As shown in Fig. 3, the pipeline takes heterogeneous graph input with typed nodes (VT for tasks, VR for resources, VM for memory), processes it through a GNN encoder with typed message passing, and produces multi-task predictions with calibrated uncertainty via evidential regression heads. The model takes task DAG G = (V,E), device sheet D, runtime state S, and action a = (m, f, p), outputting predictions y with calibrated uncertainty U.

4.1 Heterogeneous Graph Representation

The full intuition behind our task-resource-memory decomposition is provided in the supplementary material.

Node Types. (complete specifications in the supplementary material.) Task nodes VT encode CFG-derived features (loop count, max depth, cyclomatic complexity, branch density), DAG topology metrics (depth, distance-to-sink, betweenness centrality), static code statistics (estimated instructions, bytes moved), and optional runtime snapshots (recent performance counters, run-mode flags). Resource nodes VR encode per-core state: DVFS step (index and one-hot), core mask bit, cluster ID for heterogeneous architectures, utilization (exponential moving average), thermal headroom (Tmax-Tcurrent), temperature trend (∆T over recent samples), and bandwidth proxy. Memory nodes VM encode cache hierarchy: level identifier, capacity/associativity/line size, and latency/bandwidth proxies.

Device constants from D (DVFS tables, cache sizes, governor flags) are broadcast as shared features during node encoding.

Edge Types. (detailed rationale in the supplementary material.) Four edge types capture performance-critical interactions. ETT (task-task) edges encode precedence constraints with attributes: dependency type (spawn/join/data), critical-edge flag (on longest path), hop distance, and contention proxies. The critical path determines minimum makespan; fork/join patterns reveal synchronization overhead. ETR (task-resource) edges connect tasks to cores under the scheduling assignment, with affinity strength and migration overhead attributes. Task-to-core affinity affects cache locality; load imbalance increases makespan. ERR (resourceresource) edges connect cores sharing hardware components (L2 caches, memory controllers) to model contention, with sharing degree and interconnect latency attributes. ERM (resource-memory) edges connect cores to cache levels, encoding bandwidth allocation. Memory-bound workloads are bottlenecked by bandwidth; cache miss rates determine effective memory latency.

4.2 GNNArchitecture

Full architecture specifications are provided in the supplementary material.

Type-Specific Encoders. Since different node types have distinct feature spaces, we employ type-specific MLPs to encode raw features into a common embedding space of dimension d = 128: h(0) v = MLPtype(v)(xv; θtype(v)) where type(v) ∈ {T, R,M}. Each MLP has 2-3 layers with ReLU activations and dropout p = 0.1. Topological encodings (positional embeddings from DAG depth, distance-to-sink, core cluster membership) are concatenated before encoding.

Heterogeneous GAT Layers. The core architecture consists of 3-6 heterogeneous graph attention layers that aggregate information from neighbors while accounting for edge types. For each layer l: h(l+1) v = σ (h(l) v + ∑r∈R ∑u∈Nr(v) α(l) uv,rW(l) r h(l) u ) where R = {TT, TR, RR, RM}, Nr(v) is the neighborhood under edge type r, α(l) uv,r is the attention coefficient, W(l) r is a typespecific transform, and σ is ELU. Attention coefficients incorporate edge features euv,r (e.g., contention proxies). Multihead attention (4-8 heads) captures diverse interaction patterns.

Graph-Level Pooling. After the final layer L, hierarchical pooling aggregates per-type embeddings: hG = CONCAT(POOLT , POOLR, POOLM) where pooling can be mean, max, or attention-based. This yields a fixed-size graph representation (256-512 dimensions) regardless of graph size, enabling batched inference.

4.3 Evidential Learning for Uncertainty Quantification

Instead of directly predicting performance values, GraphPerfRT learns parameters of a Normal-Inverse-Gamma (NIG) distribution for each metric, enabling uncertainty-aware predictions in a single forward pass (full formulation in the supplementary material).

Prediction Heads. For each metric k ∈ {makespan, energy, cache misses, branch misses, utilization}, an evidential head outputs NIG parameters: (γk, νk, αk, βk) = MLPk(hG; θk) with νk = softplus(˜ νk) + 1, αk = softplus(˜αk) + 1, βk = softplus( ˜ βk) ensuring valid NIG parameters (νk, αk > 1, βk > 0). The mean prediction is ˆ yk = γk, with uncertainty decomposition: Aleatorick = βk/(αk - 1), Epistemick = βk/(νk(αk - 1)). Aleatoric uncertainty captures irreducible noise from OS scheduling and co-runner interference; epistemic uncertainty reflects model uncertainty that decreases with more training data.

Loss Function. Training minimizes the NIG negative log marginal likelihood with non-saturating uncertainty regularization [Wu et al., 2024] to address evidence contraction on high-error samples, plus a ranking loss aligned to makespanfirst scheduling objectives. The non-saturating term prevents the model from being overconfident on out-of-distribution inputs by penalizing high evidence when predictions are inaccurate, ensuring robust uncertainty estimates critical for thermal safety. The ranking loss operates on Lower Confidence Bounds (LCB = γ - kσ, where σ = √β(ν + 1)/(ν(α - 1)) is the total predictive standard deviation) rather than point estimates, promoting risk-aware ordering that prioritizes configurations with both low predicted makespan and high confidence.

4.4 Training Procedure

GraphPerf-RT is trained using a multi-stage procedure designed for multi-task learning with uncertainty quantification (extended details in the supplementary material).

Stage 1: Feature Learning. The model is first trained using a standard multi-task regression loss (MSE per target, weighted by inverse variance), focusing on prediction accuracy without uncertainty quantification. Optimizer: AdamW with learning rate 10-3 , batch size 32-128 depending on graph size, epochs 50-100 with early stopping on validation MAE.

Stage 2: Evidential Training. The model is fine-tuned using the evidential loss function, enabling uncertainty quantification while maintaining prediction accuracy. Learning rate reduced to 10-4 with gradient clipping (norm 1.0) to handle NIG sensitivity, epochs 20-50.

Stage 3: Calibration. Post-hoc calibration on held-out data scales the predictive standard deviation σ′ = τ · σ where τ is fit to achieve target PICP>95% at 95% confidence. The scalar τ is optimized globally (across all platforms) to minimize |PICP - 0.95| on the validation set. The model intentionally produces wider intervals than strictly necessary, ensuring scheduling decisions never rely on overconfident predictions-essential for safety-critical embedded systems.

Regularization. Graph edge dropout (p = 0.1-0.2), small feature noise (σ = 0.05), and mild device augmentation (±5% DVFS tables) improve generalization. Schedulingaware ranking losses align predictions with downstream policy selection.

4.5 Ablation Summary

Heterogeneous edges contribute the largest ranking improvement (Spearman +8%), followed by runtime telemetry (+6%), CFG features (+4%), and memory nodes (+3%). Memory nodes capture cache hierarchy interactions critical for memory-bound workloads. Evidential heads minimally affect point accuracy but are essential for calibrated uncertainty (PICP=99.9%), enabling safe scheduling decisions.

5 Experiments

5.1 Experimental Setup

Hardware Platforms. We evaluate GraphPerf-RT on three embedded ARM SoCs representing diverse architectures (full specifications in the supplementary material). NVIDIA Jetson TX2 features a heterogeneous hexa-core configuration combining two Denver 2 cores with four Cortex-A57 cores, 12 discrete DVFS levels (345.6 MHz-2.0 GHz), and multiple thermal zones with a 50°C cap. RUBIK Pi is an 8core Cortex-A72-class SBC with per-core userspace DVFS and energy measurement via qcom-battmgr or hwmon rails. NVIDIA Jetson Orin NX provides 8 Cortex-A78AE cores with userspace DVFS, representing the latest generation of embedded AI platforms. Across all platforms, we configure the Linux cpufreq subsystem for userspace governor control, discover DVFS indices dynamically, and sample thermal zones before/after execution.

Benchmark Suites. We evaluate 42 programs from two complementary suites (complete descriptions in the supplementary material). BOTS provides 12 task-parallel applications: alignment, fft, fib, floorplan, health, concom, knapsack, nqueens, sort, sparselu, strassen, and uts (unbalanced tree search with irregular parallelism). PolyBench contributes 30 kernels spanning linear algebra (gemm, cholesky, lu), stencils (jacobi-2d, seidel-2d), and data mining (correlation, covariance). Each benchmark executes with multiple inputs, core counts (1-8), and DVFS settings. Total dataset: 73,920 samples with 60/20/20 splits stratified by (benchmark, input, core mask, DVFS index).

Data Collection. We implement a client-server profiling framework (details in the supplementary material). The device client configures cpufreq, applies DVFS indices, launches benchmarks via a real-time wrapper, and collects performance counters (cycles, instructions, cache/branch misses), power samples, and thermal readings. Each run produces one CSV row with timestamps, frequencies, execution time, energy, counters, and temperatures.

Graph Extraction. OpenMP sources are compiled through OMPi; ALF-llvm emits LLVM IR and ALF files; SWEET generates CFG/call graphs (pipeline details in the supplementary material). Post-processing maps entities to OpenMP tasks with topological encodings (depth, distance-to-sink, centrality).

Baselines. We compare against seven approaches (detailed descriptions in the supplementary material): Linear Regression (Ridge regularization on tabular features), Random Forest (100 trees), MLP (3-layer feedforward), GCN (homogeneous message passing), Heterogeneous Graph Transformer (HGT) with type-aware attention, plus two uncertainty quantification variants (HGT+Ensemble with 5 models, HGT+MC Dropout). All use identical splits and tuning protocols.

5.2 Results

Overall Performance. Table 2 reports aggregate results on log-transformed makespan prediction. GraphPerfRT achieves the lowest prediction error (RMSE=0.45, MAE=0.24 on log scale) and highest ranking quality (Spearman ρ=0.95). Compared to HGT (strongest baseline), GraphPerf-RT reduces RMSE by 31% (0.65→0.45) and improves R2 from 0.78 to 0.81. The Spearman correlation of 0.95 indicates strong ranking capability, enabling effective scheduling decisions.

The progression from tabular baselines (Linear, RF, MLP) to graph-based methods (GCN, HGT, GraphPerf-RT) reveals the importance of structural information. MLP achieves Spearman=0.83 without graph structure; GCN improves to 0.87 with homogeneous edges; HGT reaches 0.89 with typeaware attention; GraphPerf-RT achieves 0.95 by combining heterogeneous message passing with evidential heads and runtime context.

Uncertainty Calibration. Table 3 shows uncertainty calibration metrics for makespan prediction. The model achieves exceptional Prediction Interval Coverage Probability (PICP) of 99.9% at 95% confidence, meaning the true values fall within the predicted intervals more often than the nominal rate. This conservative calibration is intentional and desirable for safety-critical embedded systems: the model produces slightly wider intervals than strictly necessary, ensuring scheduling decisions never rely on overconfident predictions. The uncertainty decomposition shows 94% aleatoric and 6% epistemic, indicating the model correctly identifies data-driven noise (OS scheduling jitter, thermal variation) as dominant, with model uncertainty contributing a smaller component that decreases with additional training data.

Computational Efficiency. On-device inference completes in 2-7ms for typical task graphs (8 nodes, 56 edges), enabling real-time scheduling. Model size is 12.4MB, fitting embedded memory constraints (latency breakdown in the supplementary material).

5.3 RL Baseline Evaluation

To validate end-to-end utility as a world model for scheduling, we integrate GraphPerf-RT with reinforcement learning on Jetson TX2 (see Fig. 4). The real embedded environment (left) provides state observations and rewards but is slow and hazardous for exploration; GraphPerf-RT as a world model (center) enables fast, safe synthetic rollouts with uncertaintyaware risk filtering; the D3QN agent (right) learns from both real and synthetic experiences stored in a unified replay buffer.

We use GraphPerf-RT as a deterministic transition model with epistemic uncertainty quantification, providing fast inference (2-7ms) with calibrated uncertainty bounds from the NIG posterior (design rationale in the supplementary material). We select Dueling Double DQN (D3QN) for its sample efficiency with Dyna-style planning, natural handling of discrete DVFS actions, and stability on embedded platforms (comparison with PPO/SAC in the supplementary material).

We compare four RL methods spanning single-agent vs. multi-agent and model-free vs. model-based paradigms (extended analysis in the supplementary material): (1) SAMFRL: Single-Agent Model-Free RL using standard Qlearning; (2) SAMBRL: Single-Agent Model-Based RL using GraphPerf-RT for synthetic rollouts; (3) MAMFRLD3QN: Multi-Agent Model-Free RL with Dueling Double DQN; (4) MAMBRL-D3QN: Multi-Agent Model-Based RL with Dueling Double DQN, using GraphPerf-RT as shared world model. Each method trains for 200 episodes across 5 random seeds (42, 123, 456, 789, 1024). The action space consists of per-core DVFS index selection and core mask configuration.

Results. MAMBRL-D3QN achieves the best makespan (0.97 ± 0.35s) and energy (0.006 ± 0.005J), representing 66% makespan reduction (2.85s→0.97s) and 82% energy reduction (0.033J→0.006J) over single-agent model-free baselines. In the single-agent setting, SAMFRL slightly outperforms SAMBRL, suggesting model accuracy may limit single-agent planning. In the multi-agent setting, MAMFRLD3QN (MF-MA) performs worse than single-agent methods without the world model, while MAMBRL-D3QN (MBMA) significantly benefits from coordinated planning with GraphPerf-RT as the shared world model.

Analysis. The superior performance of MAMBRL-D3QN demonstrates that GraphPerf-RT provides sufficiently accurate predictions to enable effective model-based planning. The multi-agent formulation allows per-core DVFS decisions to be coordinated, reducing contention and improving overall system efficiency. Model-based methods exhibit faster initial convergence due to synthetic rollouts, though singleagent model-based (SAMBRL) plateaus at higher makespan due to limited coordination.

Table 4 shows MAMBRL-D3QN achieves the lowest average temperature (41.9°C vs. 43.9°C for model-free baselines), providing 8°C thermal headroom below the 50°C constraint compared to 6°C for baselines. While all methods maintain safe operation under our conservative test conditions, this 2°C improvement in thermal margin is critical for real deployments: it provides buffer against ambient temperature variations, enables sustained high-frequency operation without throttling, and extends hardware longevity. The uncertainty-aware filtering prevents the scheduler from proposing configurations that would violate thermal limits, ensuring safe exploration even under more aggressive optimization objectives.

Runtime Integration. Enumerate feasible actions under thermal caps, score with GraphPerf-RT, gate by uncertainty: gate(a) = (Epi(a) ≤ η) ∧ (PI(a) ≤ Tmax). Execute topranked safe action.

6 Conclusion

We presented GraphPerf-RT, an uncertainty-aware graph neural network surrogate for OpenMP scheduling on heterogeneous embedded systems. The unified heterogeneous graph representation integrates task DAG topology, CFGderived code semantics, and runtime context (DVFS, thermal state). Evidential learning with NIG priors provides calibrated uncertainty decomposition into aleatoric and epistemic components. Evaluation across three ARM platforms and 42 benchmarks demonstrates R2 = 0.81 on log-transformed makespan, Spearman ρ = 0.95, and PICP= 99.9% at 95% confidence. Integration with MAMBRL-D3QN achieves 66% makespan and 82% energy reduction over model-free baselines with zero thermal violations. See the supplementary material for limitations, broader impact, and future directions.

Acknowledgements

The work was supported by the US Office of Naval Research through grant N00014-23-1-2151 and the US National Science Foundation through grants CNS-2601685 and CNS2602744.

Reproducibility

Code, models, data, and figure scripts are publicly available at https://github.com/pivezhan/GraphPerf-RT IJCAI2026.